Integrated circuits are fabricated on the surface of a semiconductor wafer in layers, and later singulated into individual semiconductor devices, or “dies.” Many fabrication processes are repeated numerous times, constructing layer after layer until fabrication is complete. Metal layers, which typically increase in number as device complexity increases, include patterns of conductive material that are vertically insulated from one another by alternating layers of insulating material. Conductive traces are also separated within each layer by an insulating, or dielectric, material. Vertical, conductive tunnels called “vias” typically pass through insulating layers to form conductive pathways between adjacent conductive patterns.
Advancements in the size and speed of semiconductor devices continue to occur in order to meet consumer and competitive demands. The reduction in size of device features that accompanies such advancements also pushes innovation in the capabilities of manufacturing tools. Particularly, measurement techniques and tools must be able to accurately detect smaller and smaller dimensions.